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## Questions:-

Digital And Computer Organization

Assignment A

1 .  Convert the decimal number 456.7 89 to the following:

A) Binary number

B) BCD equivalent

D) Octal number

2 .Make the logic diagram of 4-bit serial shift register using J-K flip flops. Show the steps to shift the binary number 1001, through this shift register.

3. Describe the function of Cache Memory & Virtual Memory in memory organization.

Assignment B

Case Detail:

A digital computer has a memory unit with 24 bits per word. The instruction set consists of 150 different operations. All instructions have an operation code part (opcode) and an address part (allowing for only one address). Each instruction is stored in one word of memory

Suppose we have the instruction Load 1000. Given that memory and register R1 contains the values tabulated below:

 Memory Address Value 1000 1400 --- 1100 400 --- 1200 1000 --- 1300 1100 --- 1400 1300

Assuming R1 is implied in the indexed addressing mode, determine the actual value loaded into the accumulator if R1= 200 and fill in the table below:

1. How many bits are needed for the opcode? How many bits are left for the address part of the instruction?
1. What is the maximum allowable size for memory?
2. What is the largest unsigned binary number that can be accommodated in one word of memory?

Assignment C

Question No.  1

A microprocessor has a data bus with 32 lines and address bus with 20 lines. The  Maximum number of bits that can be stored in this memory is

Options

1. 32 x 220
2. 32 x 232
3. 20 x 220
4. 20 x 232

Question No.  2

Which memory is faster?

Options

1. Register
2. Cache
3. RAM
4. Hard disk

Question No.  3

Which of the following gates are called universal gates?

Options

1. AND and OR
2. AND and NAND
3. XOR and XNOR
4. NAND and NOR

Question No.  4

The decimal number +14 can be represented in 6 bit two’s complement format as

Options

1. 010010
2. 101110
3. 001110
4. 110010

Question No.  5

Options

1. 2 binary digits
2. 3 binary digits
3. 2 decimal digits
4. 3 decimal digits

Question No.  6

A reverse polish notation is evaluated with the help of--

Options

1. Stack
2. RAM
3. ROM
4. None of the above

Question No.  7

Pipeline arithmetic units are used to implement--

Options

1. Floating point operations
2. Multiplication of fixed-point numbers
3. A) and B) both
4. None of the above

Question No.  8

In NOR latch, race condition occurs when---

Options

1. R=0, S=0
2. R=0, S=1
3. R=1, S=0
4. R=1, S=1

Question No.  9

A register which can be incremented or decremented and whose primary function is point to data, is called--

Options

1. Accumulator
2. Program Counter
3. Flat register
4. Index register

Question No.  10

Which of the following is not arithmetic instruction?

Options

1. MUL
2. STORE
3. INC
4. NEG

Question No.  11

The number of fetch operations to execute instruction having immediate operand is--

Options

1. 0
2. 1
3. 2
4. NON OF THE ABOVE

Question No.  12

In instruction cycle--

Options

1. The indirect cycle is always followed by execute cycle
2. Fetch cycle is always followed by interrupts
3. Execute cycle and fetch cycles are simultaneously executed
4. None of the above

Question No.  13

Which of the following gates recognizes only words that have an odd number of 1s?

Options

1. Nand Gate
2. Exclusive -OR gate
3. NOR gate
4. And Gate

Question No.  14

Octal number system is--

Options

1. A positional system with weights 0 to 9
2. A positional system with weights 0 to 8
3. A positional system with weights 0 to 7
4. A non - positional system with weights 0 to 7

Question No.  15

A CPU has a 16 bit program counter. This means that the CPU can address--

Options

1. 16 K memory locations
2. 32 K memory locations
3. 64 K memory locations
4. 256 K memory locations

Question No.  16

The sum of two hexadecimal numbers 23D and 9AA gives the hexadecimal number--

Options

1. AF7
2. BF6
3. BE7
4. BE5

Question No.  17

Which of the following memory is not possible?

Options

1. 10 bit address,12 bit cell size, 1024 cells
2. 9 bit address, 8 bit cell size 1024, cells
3. 11 bit address, 8 bit cell size, 1024 cells
4. 10 bit address, 8 bit cell size, 1024 cells

Question No.  18

2´s complement of 10101100 is--

Options

1. 1010100
2. 1100010
3. 1001001
4. 1100101

Question No.  19

Virtual memory system allows the employment of--

Options

2. More space than the address space
3. More than the hard disk space
4. Cache memory

Question No.  20

DMA module takes control of bus in order to transfer data when--

Options

1. Only when the CPU does not need the bus
2. The data is ready to transfer
3. Interrupt is being serviced by CPU
4. None of the above

Question No.  21

Pseudo-operation means--

Options

1. Simulation of arithmetic operations
2. Directive to assembler to perform a specific operation
3. Those operations which produce single machine instructions
4. None of the above

Question No.  22

The typical microprocessor is most likely to contain--

Options

1. ALU
2. RAM
3. Power supply
4. Audio input pin

Question No.  23

In register addressing mode operands are looked at--

Options

1. IN CACHE
2. In secondary storage
3. In CPU
4. In primary memory

Question No.  24

The sum of two octal numbers 12 and 17 would be in octal as--

Options

1. 21
2. 23
3. 29
4. 31

Question No.  25

The two parts of a microprocessor instruction are called operation and the--

Options

1. Operator
2. Operand
3. Observable
4. None of the above

Question No.  26

An attempt to execute illegal of undefined instruction may lead to--

Options

1. TRAP event
2. I/O interrupt
3. CPU malfunctioning
4. None of the above

Question No.  27

In karnaugh map of four variables A, B, C and D, the term--

Options

1. will cover a strip of two squares
2. will cover a strip of four squares
3. will cover a strip of three squares
4. will cover a strip of eight squares

Question No.  28

In the memory hierarchy, the fastest memory is--

Options

1. SRAM
2. Cache
3. CPU registers
4. DRAM

Question No.  29

The maximum number of directly addressable location in the memory of a processor having 10 bits wide control bus, 20 bit address bus and 8 -bit data bus is--

Options

1. 1 K
2. 2 K
3. 1 M
4. 2 M

Question No.  30

Relocation of program is possible by--

Options

1. Dynamic programming
4. None of these

Question No.  31

What can be used to store one or more bits of data, which can accept and/or transfer information serially?

Options

1. Parallel registers
2. Shift registers
3. Counters
4. None of these

Question No.  32

To avoid wastage of memory, the instruction length should be--

Options

1. Multiple of character size only
2. Of word size only
3. Of word size which is multiple of character size
4. None of these

Question No.  33

DMA modules can communicate with CPU through--

Options

1. Interrupt
2. Cycle stealing
3. Branch instruction
4. None of these

Question No.  34

The sequence of microinstructions is also known as--

Options

1. Software
2. Hardware
3. Firmware
4. None of these

Question No.  35

The number of select input lines required for an 8 to 1 multiplexer is--

Options

1. 1K
2. 2K
3. 1M
4. None of these

Question No.  36

A CPU has a 16 bit program counter. This means that the CPU can address--

Options

1. 16 K memory locations
2. 32 K memory locations
3. 64 K memory locations
4. 256 K memory locations

Question No.  37

The minimum numbers of bits required to represent numbers in the range -50 to 50 is-

Options

1. 5
2. 7
3. 6
4. 8

Question No.  38

The sum of two hexadecimal numbers 23D and 9AA gives the hexadecimal numbe--r

Options

1. AF7
2. BF6
3. BE7
4. BE5

Question No.  39

Stored program concept may provide--

Options

1. Maximal use of secondary storage
2. Program to modify its own instructions
3. Use of cache memory
4. None of the above

Question No.  40

Viewing computers single addressable memory of unlimited size is connected with concept of --

Options

1. Virtual memory
2. Associative memory
3. Dynamic memory
4. None of the above

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January 29, 2015