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Title Name Amity Solved Assignment Computer Architecture and Parallel Processing
University AMITY
Service Type Assignment
Course MCA
Semester Semester-V Course: MCA
Short Name or Subject Code COMPUTER ARCHITECTURE AND PARALLEL PROCESSING
Commerce line item Type Semester-V Course: MCA
Product Assignment of MCA Semester-V (AMITY)
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Solved Assignment


  Questions :-

                                                                                                                                      COMPUTER ARCHITECTURE AND PARALLEL PROCESSING

Section A 

Q1.    Explain Flynn classifications of various computers based on notions of instructions and data streams.           

Q2 .    What are static and dynamic networks of multiprocessor? Give two examples of both.

Q3 .     Differentiate between RICS and CICS processors.                   

Q4 .     Explain nonlinear pipeline processor with suitable example.  

Q5 .     Differentiate between multiprocessors and multi-computers.  

 

Section B

Case Study

ABC.com is a website where you can watch original movie DVDs.  It currently maitains the list of visitors and details of their visit.  The website gets almost 1 billion visitors everyday and at midnight it processes all the information.  It takes almost 5 hours to pocess all the information and the system remains down for that long.  It causes the company a huge loss.  The company decided to buy a super computer for faster analysis.  The supercomputer has 10 processors.  Now the need is to design a parallel algorithm for the following problems: We now have the list of visitors for the day and the number of movies they watched.

Q1.      Design a parallel algorithm that would sort the names alphabetically.

Q2.      Now write a parallel search algorithm that would find a visitor "John" in this sorted list and show how many movies he watched.

Q3.      Can either sorting or searching achieve super linear speedup?

 

 

Section C

Question No.  1

Marks - 10


What was the period of third generation of electronics computers? 

 

Options

 
   

1955-64

 

1965-74

 

1970-80

 

1975-90

 

Question No.  2

Marks - 10


Which of the following is an example of shared memory multiprocessor  models?

 

Options

 
   

Uniform Memory Access (UMA)

 

Non-uniform Memory Access (NUMA)

 

Cache Only Memory Access (COMA)

 

All of the above.

 

Question No.  3

Marks - 10


Network latency refers to …

 

Options

 
   

The maximum data transfer rate in terms of M bytes/sec transmission through the network.

 

The worst-case time delay for a unite message to be transferred through the network.

 

Implementation cost such as those for wires, switches, connectors, arbitration etc.

 

The ability of the network to be modularly expandable with a scalable performance with increasing machine resource

 

Question No.  4

Marks - 10


Wich of the following is an example of dynamic connection network?     

 

Options

 
   

Digital Bus

 

Omega Network

 

Crossbar Switch Network

 

All of the above

 

Question No.  5

Marks - 10


. VLIW stands for…

 

Options

 
   

Very Large Integration Word

 

Very Long Integration Word

 

Very Long Instruction Word

 

Very Light Image Word

 

Question No.  6

Marks - 10


Compiler used in implicit parallelism is…                                         

 

Options

 
   

Parallelizing compiler

 

Concurrency preserving compiler

 

Simple HLL compiler

 

None of these.

 

Question No.  7

Marks - 10


Number of nodes in the graph is called the…           

 

Options

 
   

In- degree

 

Out- degree

 

Total- degree

 

Network size.

 

Question No.  8

Marks - 10


. Intel i960CA model is an example of….     

 

Options

 
   

CICS scalar processors

 

RICS scalar processors

 

Super scalar processors

 

Vector processors

 

Question No.  9

Marks - 10


 

Which of the following is an example of static connection network?                       

 

Options

 
   

3-cube

 

Switch- modules

 

Systolic array

 

a. and c.

 

Question No.  10

Marks - 10


Paging and segmentation are associated to …

 

Options

 
   

Cache- memory

 

Associative memory

 

Virtual memory

 

Volatile memory

 

Question No.  11

Marks - 10


In Distributed-Memory Multi-computers, each node is an autonomous computer consisting of a…….

 

Options

 
   

Processor

 

Local Memory

 

Attached Disk

 

All of the above

 

Question No.  12

Marks - 10


 

PRAM stands for…….

 

Options

 
   

Programmable Random Access Memory.

 

Parallel Random Access Memory.

 

Parallel Random Access Machine.

 

None of the above.

 

Question No.  13

Marks - 10


 

Synchronization of all PE’s in an SIMD computer is done by using…….

 

Options

 
   

Hardware

 

Software

 

Firmware

 

Both a. and b.

 

Question No.  14

Marks - 10


 

. Parallelism can be achieved using …….

 

Options

 
   

Hardware

 

Software

 

Both hardware and software.

 

It can not be achieved using hardware or software.

 

Question No.  15

Marks - 10


. Network routing algorithms could be ……

 

Options

 
   

Static only

 

Dynamic only

 

Both static and dynamic.

 

Depends on network user.

 

Question No.  16

Marks - 10


Network scalability refers to ……

 

Options

 
   

The ability of a network to be modularly expandable with a scalable performance with increasing machine resources.

 

The machine data transfer rate, in terms of M bytes /s transmitted through the network.

 

The worst case time delay for a unit message to be transferred through the network.

 

Implementation costs such as those for wires, switches, connectors, arbitration and interface logic.

 

Question No.  17

Marks - 10


Base line network is an example of ….

 

Options

 
   

Static connection network.

 

Dynamic connection network.

 

It depends on the design.

 

None of the above.

 

Question No.  18

Marks - 10


 

Crossbar network is an example of ……

 

Options

 
   

Static connection network.

 

Dynamic connection network.

 

It depends on the design.

 

None of the above.

 

Question No.  19

Marks - 10


 

Which of the following are speedup performance laws?

 

Options

 
   

Amdahl’s law for a fixed work load.

 

Fixed –load speedup.

 

Amdahl’s law revisited.

 

All the above.

 

Question No.  20

Marks - 10


 

Which of the following are scalability metrics?

 

Options

 
   

Machine size.

 

Clock Rate.

 

I/O demand

 

All the above

 

Question No.  21

Marks - 10


 

. Instruction level parallelism could be achieved through……

 

Options

 
   

Instruction Pipelining.

 

Vector Processing.

 

Array Processing

 

Multi Processor Architecture.

 

Question No.  22

Marks - 10


 

. Which of the following is the fastest device in terms of speed?

 

Options

 
   

Cache Memory

 

CPU Registers

 

Main Memory

 

Disk Storage

 

Question No.  23

Marks - 10


 

Cache Locality of references refers to which of the following?

 

Options

 
   

Temporal Locality

 

Sequential Locality

 

Both a. and b.

 

None of the above.

 

Question No.  24

Marks - 10


Cache hit ratio is?

 

Options

 
   

Number of times data found in cache / Total number of access.

 

Number of times data not found in cache / total number of access.

 

Number of times data found in RAM/ total number of access.

 

Number of times data found in hard disk/ total number of access.

 

Question No.  25

Marks - 10


Which techniques are examples of virtual memory?

 

Options

 
   

Demand paged memory management.

 

Segmented memory management.

 

Segmented paged memory management

 

a. and b. only.

 

Question No.  26

Marks - 10


 

Virtual memory could be achieved using which of the memory device?

 

Options

 
   

Cache memory

 

Main memory

 

CPU Register

 

Secondary Memory

 

Question No.  27

Marks - 10


Which is the fastest memory replacement technique?

 

Options

 
   

FCFS

 

LRU

 

OPT

 

Depends on demand of size and order.

 

Question No.  28

Marks - 10


 

Which of the followings are cache addressing models?

 

Options

 
   

Physical address caches.

 

Virtual address caches.

 

Both a. and b.

 

None of the above.

 

Question No.  29

Marks - 10


In which of the cache mapping scheme, word size of the cache is smallest?

 

Options

 
   

Direct mapping

 

Associative mapping

 

Set associative mapping

 

In all the above cases, word size of the cache is same

 

Question No.  30

Marks - 10


 

Cache coherence may occur in …..

 

Options

 
   

Multi-computer System.

 

Multiprocessor Systems.

 

Single Processor Systems.

 

Both a. and b.

 

Question No.  31

Marks - 10


Cache coherence is the problem in which…..

 

Options

 
   

Duplicate data is in different caches of processors in multiprocessor systems.

 

Duplicate data in cache and in RAM.

 

Duplicate data in cache, RAM and Hard Disk.

 

All the above.

 

Question No.  32

Marks - 10


Write-Through Caches applies the technique……

 

Options

 
   

Whenever there is modification in cache data, in main memory data modification will be finally once with same value which is finally modified in cache.

 

Whenever there is modification in cache data, simultaneously in main memory data modification will occur.

 

There is no relation of data modification of cache and main memory.

 

It varies from processor to processor.

 

Question No.  33

Marks - 10


 

Write-Back Cache applies the technique…….

 

Options

 
   

Whenever there is modification in cache data, in main memory data modification will be finally once with same value which is finally modified in cache.

 

Whenever there is modification in cache data, simultaneously in main memory data modification will occur.

 

There is no relation of data modification of cache and main memory.

 

It varies from processor to processor.

 

Question No.  34

Marks - 10


 

What is the basic unit in store-and-forward routing?

 

Options

 
   

Input/ Output stream.

 

Packet.

 

Byte.

 

Message.

 

Question No.  35

Marks - 10


Masking instruction is an instruction of which category?

 

Options

 
   

Pipeline Instruction

 

Vector Instruction

 

Scalar Instruction

 

Array Instruction

 

Question No.  36

Marks - 10


DEC VAX 9000 is a….

 

Options

 
   

Mainframes.

 

Mini Super Computer.

 

Mini Computer.

 

Multi Computer Architecture.

 

Question No.  37

Marks - 10


Multi-pipelining could be achieved in ….

 

Options

 
   

Multi- Processor Systems.

 

Multi-Computer System.

 

Super Computer

 

Mainframe

 

Question No.  38

Marks - 10


Label-1 cache may be in ….

 

Options

 
   

Inside processor chip.

 

Outside processor chip and on board.

 

A part of the RAM.

 

A part of the hard disk.

 

Question No.  39

Marks - 10


Master-slave architecture is associated with…

 

Options

 
   

Multi-processor architecture.

 

Multi-Computer architecture.

 

Multi level cache coherence.

 

All the above.

 

Question No.  40

Marks - 10


Using Flynn´s taxonomy, the various architectures can be divided into categories.

 

Options

 
   

3

 

4

 

5

 

6

  Answers :-

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